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Aidan Keady
Aidan Keady
Endura Technologies
Verified email at ieee.org
Title
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Year
A heterogeneous 3D-IC consisting of two 28 nm FPGA die and 32 reconfigurable high-performance data converters
C Erdmann, D Lowney, A Lynam, A Keady, J McGrath, E Cullen, ...
IEEE Journal of Solid-State Circuits 50 (1), 258-269, 2014
1052014
Programmable cable with deskew and performance analysis circuits
AG Keady, JA Keane, JA Rea, B Griffin, JM Horan
US Patent 7,996,584, 2011
522011
Data recovery system for source synchronous data channels
JA Rea, AG Keady, JA Keane, JM Horan
US Patent 8,520,776, 2013
49*2013
Tree structure for mismatch noise-shaping multibit DAC
A Keady, C Lyden
Electronics Letters 33 (17), 1431-1431, 1997
421997
Data recovery system for source synchronous data channels
REA Judy, A Keady, J Keane, J Horan
US Patent App. 11/623,070, 2007
412007
High-speed cable with embedded power control
AG Keady, JA Keane, JA Rea, B Griffin, JM Horan
US Patent 7,861,277, 2010
372010
Programmable high-speed cable with printed circuit board and boost device
AG Keady, JA Keane, JA Rea, B Griffin, JM Horan
US Patent 8,295,296, 2012
312012
High-speed cable with embedded power control
AG Keady, JA Keane, JA Rea, B Griffin, JM Horan
US Patent 7,908,634, 2011
302011
Mismatch noise shaper for DAC-SUBDAC structures
C Lyden, A Keady
US Patent 6,137,430, 2000
222000
System and method for calibrating a high-speed cable
AG Keady, JA Keane, JA Rea, B Griffin, JM Horan
US Patent 7,729,874, 2010
212010
Programmable high-speed cable with boost device
AG Keady, JA Keane, JA Rea, B Griffin, JM Horan
US Patent 8,058,918, 2011
182011
Programmable high-speed cable with printed circuit board and boost device
AG Keady, JA Keane, JA Rea, B Griffin, JM Horan
US Patent 8,254,402, 2012
122012
Data recovery system for source synchronous data channels
JA Rea, AG Keady, JA Keane, JM Horan
US Patent 7,809,085, 2010
122010
Reduction of mismatch errors for multibit oversampled data converters
C Lyden, A Keady
US Patent 5,986,595, 1999
111999
Embedded power control in a high-speed cable
AG Keady, JA Keane, JA Rea, B Griffin, JM Horan
US Patent 8,006,277, 2011
102011
Programmable high-speed cable with boost device
AG Keady, JA Keane, JA Rea, B Griffin, JM Horan
US Patent 7,936,197, 2011
102011
A 90nm, low power VCO with reduced KVCO and sub-band spacing variation
D Collins, A Keady, G Szczepkowski, R Farrell
2011 IEEE 9th International New Circuits and systems conference, 141-144, 2011
82011
Fast frequency calibration of VCO's in phase-locked loops
D Collins, A Keady, R Farrell
IET Irish Signals and Systems Conference (ISSC 2010), 147-151, 2010
62010
A new architecture for bandpass sigma delta analogue to digital conversion
A Keady, C Lyden
IET Digital Library, 1995
51995
12 MHz to 5800 MHz fully integrated, dual path tuned, low jitter, LC-PLL frequency synthesizer
A Keady, G Szczepkowski, R Farrell
IET Digital Library, 2012
42012
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